BOM上传  搜 索
热门： SMBJ180A P6SMBJ180AJ ASMBJ180A-HF AUSMBJ180A-HF 1924580-1
在线客服

ANALOG DEVICES INC

Analog Devices, Inc.（NASDAQ: ADI)是全球领先的半导体公司，致力于在现实世界与数字世界之间架起桥梁，以实现智能边缘领域的突破性创新。ADI提供结合模拟、数字和软件技术的解决方案，推动数字化工厂、汽车和数字医疗等领域的持续发展，应对气候变化挑战，并建立人与世界万物的可靠互联。ADI公司2022财年收入超过120亿美元，全球员工约2.5万人。

AD744JCHIPS

分类:
数据:

简介: 精密、500 ns建立时间、BiFET运算放大器

Product Lifecycle: 不推荐用于新设计 Package: 8-Pin TO-99,8-Lead PDIP,8-Lead CerDIP,8-Lead SOIC,CHIPS OR DIE # of Amps: 1 GBP (typ): 13MHz BW -3 dB (typ): 13MHz Slew Rate (typ): 75V/us Vos (typ): 250µV Vos (max): 500µV Vos TC (typ): 5µV/°C Vos TC (max): 10µV/°C VNoise Density (typ): 16nV/rtHz Current Noise Density (typ): 10fA/rtHz 0.1 to 10 Hz VNoise (typ): 2µV p-p Ibias (typ): 30pA Ibias (max): 100pA Ios (typ): 10pA Ios (max): 50pA Iq/Amp (typ): 3.5mA Iq/Amp (max): 5mA Vs span (min): 9V
Vs span (max): 36V CMRR (typ): 88dB CMRR (min): 82dB Input Architecture: JFET PSRR DC (typ): 95dB In V+ Headroom (typ): 500mV In V- Headroom (typ): 3.5V Out V+ Headroom (max): 2V Out V+ Headroom (typ): 1.1V Out V- Headroom (typ): 1.7V Out V- Headroom (max): 2.5V Aol (typ): 112dB Min Stable Gain: 2V/V Shutdown: No Over-the-Top: No Ccm (typ): 5.5pF Cdiff (typ): 5.5pF Open Loop Rout: 60Ohms Feedback Type: Voltage Package Area: 31mm² (8-Lead SOIC) (AD744JRZ)mm² Eval / Ref Circuit: Evaluation board Export Classification: EAR99 Automotive: No Reliability Level: 883,DIE Temp Range: -55 to 125°C Package Finish Code: E3, NA, PB Package Height: 1.75mm (8-Lead SOIC) (AD744JRZ)mm Launch Date: 2005-05-03 Terminal Finish: E3, NA, PB Temp Range Code: NA EP: No Design Tools: LTspice

AD744JRZ

分类:
数据:

简介: 精密、500 ns建立时间、BiFET运算放大器

Product Lifecycle: 不推荐用于新设计 Package: 8-Pin TO-99,8-Lead PDIP,8-Lead CerDIP,8-Lead SOIC,CHIPS OR DIE # of Amps: 1 GBP (typ): 13MHz BW -3 dB (typ): 13MHz Slew Rate (typ): 75V/us Vos (typ): 250µV Vos (max): 500µV Vos TC (typ): 5µV/°C Vos TC (max): 10µV/°C VNoise Density (typ): 16nV/rtHz Current Noise Density (typ): 10fA/rtHz 0.1 to 10 Hz VNoise (typ): 2µV p-p Ibias (typ): 30pA Ibias (max): 100pA Ios (typ): 10pA Ios (max): 50pA Iq/Amp (typ): 3.5mA Iq/Amp (max): 5mA Vs span (min): 9V
Vs span (max): 36V CMRR (typ): 88dB CMRR (min): 82dB Input Architecture: JFET PSRR DC (typ): 95dB In V+ Headroom (typ): 500mV In V- Headroom (typ): 3.5V Out V+ Headroom (max): 2V Out V+ Headroom (typ): 1.1V Out V- Headroom (typ): 1.7V Out V- Headroom (max): 2.5V Aol (typ): 112dB Min Stable Gain: 2V/V Shutdown: No Over-the-Top: No Ccm (typ): 5.5pF Cdiff (typ): 5.5pF Open Loop Rout: 60Ohms Feedback Type: Voltage Package Area: 31mm² (8-Lead SOIC) (AD744JRZ)mm² Eval / Ref Circuit: Evaluation board Export Classification: EAR99 Automotive: No Reliability Level: 883,DIE Temp Range: -55 to 125°C Package Finish Code: E3, NA, PB Package Height: 1.75mm (8-Lead SOIC) (AD744JRZ)mm Launch Date: 2005-05-03 Terminal Finish: E3, NA, PB Temp Range Code: NA EP: No Design Tools: LTspice

AD744JNZ

分类:
数据:

简介: 精密、500 ns建立时间、BiFET运算放大器

Product Lifecycle: 不推荐用于新设计 Package: 8-Pin TO-99,8-Lead PDIP,8-Lead CerDIP,8-Lead SOIC,CHIPS OR DIE # of Amps: 1 GBP (typ): 13MHz BW -3 dB (typ): 13MHz Slew Rate (typ): 75V/us Vos (typ): 250µV Vos (max): 500µV Vos TC (typ): 5µV/°C Vos TC (max): 10µV/°C VNoise Density (typ): 16nV/rtHz Current Noise Density (typ): 10fA/rtHz 0.1 to 10 Hz VNoise (typ): 2µV p-p Ibias (typ): 30pA Ibias (max): 100pA Ios (typ): 10pA Ios (max): 50pA Iq/Amp (typ): 3.5mA Iq/Amp (max): 5mA Vs span (min): 9V
Vs span (max): 36V CMRR (typ): 88dB CMRR (min): 82dB Input Architecture: JFET PSRR DC (typ): 95dB In V+ Headroom (typ): 500mV In V- Headroom (typ): 3.5V Out V+ Headroom (max): 2V Out V+ Headroom (typ): 1.1V Out V- Headroom (typ): 1.7V Out V- Headroom (max): 2.5V Aol (typ): 112dB Min Stable Gain: 2V/V Shutdown: No Over-the-Top: No Ccm (typ): 5.5pF Cdiff (typ): 5.5pF Open Loop Rout: 60Ohms Feedback Type: Voltage Package Area: 31mm² (8-Lead SOIC) (AD744JRZ)mm² Eval / Ref Circuit: Evaluation board Export Classification: EAR99 Automotive: No Reliability Level: 883,DIE Temp Range: -55 to 125°C Package Finish Code: E3, NA, PB Package Height: 1.75mm (8-Lead SOIC) (AD744JRZ)mm Launch Date: 2005-05-03 Terminal Finish: E3, NA, PB Temp Range Code: NA EP: No Design Tools: LTspice

AD744JRZ-REEL

分类:
数据:

简介: 精密、500 ns建立时间、BiFET运算放大器

Product Lifecycle: 不推荐用于新设计 Package: 8-Pin TO-99,8-Lead PDIP,8-Lead CerDIP,8-Lead SOIC,CHIPS OR DIE # of Amps: 1 GBP (typ): 13MHz BW -3 dB (typ): 13MHz Slew Rate (typ): 75V/us Vos (typ): 250µV Vos (max): 500µV Vos TC (typ): 5µV/°C Vos TC (max): 10µV/°C VNoise Density (typ): 16nV/rtHz Current Noise Density (typ): 10fA/rtHz 0.1 to 10 Hz VNoise (typ): 2µV p-p Ibias (typ): 30pA Ibias (max): 100pA Ios (typ): 10pA Ios (max): 50pA Iq/Amp (typ): 3.5mA Iq/Amp (max): 5mA Vs span (min): 9V
Vs span (max): 36V CMRR (typ): 88dB CMRR (min): 82dB Input Architecture: JFET PSRR DC (typ): 95dB In V+ Headroom (typ): 500mV In V- Headroom (typ): 3.5V Out V+ Headroom (max): 2V Out V+ Headroom (typ): 1.1V Out V- Headroom (typ): 1.7V Out V- Headroom (max): 2.5V Aol (typ): 112dB Min Stable Gain: 2V/V Shutdown: No Over-the-Top: No Ccm (typ): 5.5pF Cdiff (typ): 5.5pF Open Loop Rout: 60Ohms Feedback Type: Voltage Package Area: 31mm² (8-Lead SOIC) (AD744JRZ)mm² Eval / Ref Circuit: Evaluation board Export Classification: EAR99 Automotive: No Reliability Level: 883,DIE Temp Range: -55 to 125°C Package Finish Code: E3, NA, PB Package Height: 1.75mm (8-Lead SOIC) (AD744JRZ)mm Launch Date: 2005-05-03 Terminal Finish: E3, NA, PB Temp Range Code: NA EP: No Design Tools: LTspice

AD744JRZ-REEL7

分类:
数据:

简介: 精密、500 ns建立时间、BiFET运算放大器

Product Lifecycle: 不推荐用于新设计 Package: 8-Pin TO-99,8-Lead PDIP,8-Lead CerDIP,8-Lead SOIC,CHIPS OR DIE # of Amps: 1 GBP (typ): 13MHz BW -3 dB (typ): 13MHz Slew Rate (typ): 75V/us Vos (typ): 250µV Vos (max): 500µV Vos TC (typ): 5µV/°C Vos TC (max): 10µV/°C VNoise Density (typ): 16nV/rtHz Current Noise Density (typ): 10fA/rtHz 0.1 to 10 Hz VNoise (typ): 2µV p-p Ibias (typ): 30pA Ibias (max): 100pA Ios (typ): 10pA Ios (max): 50pA Iq/Amp (typ): 3.5mA Iq/Amp (max): 5mA Vs span (min): 9V
Vs span (max): 36V CMRR (typ): 88dB CMRR (min): 82dB Input Architecture: JFET PSRR DC (typ): 95dB In V+ Headroom (typ): 500mV In V- Headroom (typ): 3.5V Out V+ Headroom (max): 2V Out V+ Headroom (typ): 1.1V Out V- Headroom (typ): 1.7V Out V- Headroom (max): 2.5V Aol (typ): 112dB Min Stable Gain: 2V/V Shutdown: No Over-the-Top: No Ccm (typ): 5.5pF Cdiff (typ): 5.5pF Open Loop Rout: 60Ohms Feedback Type: Voltage Package Area: 31mm² (8-Lead SOIC) (AD744JRZ)mm² Eval / Ref Circuit: Evaluation board Export Classification: EAR99 Automotive: No Reliability Level: 883,DIE Temp Range: -55 to 125°C Package Finish Code: E3, NA, PB Package Height: 1.75mm (8-Lead SOIC) (AD744JRZ)mm Launch Date: 2005-05-03 Terminal Finish: E3, NA, PB Temp Range Code: NA EP: No Design Tools: LTspice

AD744KNZ

分类:
数据:

简介: 精密、500 ns建立时间、BiFET运算放大器

Product Lifecycle: 不推荐用于新设计 Package: 8-Pin TO-99,8-Lead PDIP,8-Lead CerDIP,8-Lead SOIC,CHIPS OR DIE # of Amps: 1 GBP (typ): 13MHz BW -3 dB (typ): 13MHz Slew Rate (typ): 75V/us Vos (typ): 250µV Vos (max): 500µV Vos TC (typ): 5µV/°C Vos TC (max): 10µV/°C VNoise Density (typ): 16nV/rtHz Current Noise Density (typ): 10fA/rtHz 0.1 to 10 Hz VNoise (typ): 2µV p-p Ibias (typ): 30pA Ibias (max): 100pA Ios (typ): 10pA Ios (max): 50pA Iq/Amp (typ): 3.5mA Iq/Amp (max): 5mA Vs span (min): 9V
Vs span (max): 36V CMRR (typ): 88dB CMRR (min): 82dB Input Architecture: JFET PSRR DC (typ): 95dB In V+ Headroom (typ): 500mV In V- Headroom (typ): 3.5V Out V+ Headroom (max): 2V Out V+ Headroom (typ): 1.1V Out V- Headroom (typ): 1.7V Out V- Headroom (max): 2.5V Aol (typ): 112dB Min Stable Gain: 2V/V Shutdown: No Over-the-Top: No Ccm (typ): 5.5pF Cdiff (typ): 5.5pF Open Loop Rout: 60Ohms Feedback Type: Voltage Package Area: 31mm² (8-Lead SOIC) (AD744JRZ)mm² Eval / Ref Circuit: Evaluation board Export Classification: EAR99 Automotive: No Reliability Level: 883,DIE Temp Range: -55 to 125°C Package Finish Code: E3, NA, PB Package Height: 1.75mm (8-Lead SOIC) (AD744JRZ)mm Launch Date: 2005-05-03 Terminal Finish: E3, NA, PB Temp Range Code: NA EP: No Design Tools: LTspice

AD744KRZ

分类:
数据:

简介: 精密、500 ns建立时间、BiFET运算放大器

Product Lifecycle: 不推荐用于新设计 Package: 8-Pin TO-99,8-Lead PDIP,8-Lead CerDIP,8-Lead SOIC,CHIPS OR DIE # of Amps: 1 GBP (typ): 13MHz BW -3 dB (typ): 13MHz Slew Rate (typ): 75V/us Vos (typ): 250µV Vos (max): 500µV Vos TC (typ): 5µV/°C Vos TC (max): 10µV/°C VNoise Density (typ): 16nV/rtHz Current Noise Density (typ): 10fA/rtHz 0.1 to 10 Hz VNoise (typ): 2µV p-p Ibias (typ): 30pA Ibias (max): 100pA Ios (typ): 10pA Ios (max): 50pA Iq/Amp (typ): 3.5mA Iq/Amp (max): 5mA Vs span (min): 9V
Vs span (max): 36V CMRR (typ): 88dB CMRR (min): 82dB Input Architecture: JFET PSRR DC (typ): 95dB In V+ Headroom (typ): 500mV In V- Headroom (typ): 3.5V Out V+ Headroom (max): 2V Out V+ Headroom (typ): 1.1V Out V- Headroom (typ): 1.7V Out V- Headroom (max): 2.5V Aol (typ): 112dB Min Stable Gain: 2V/V Shutdown: No Over-the-Top: No Ccm (typ): 5.5pF Cdiff (typ): 5.5pF Open Loop Rout: 60Ohms Feedback Type: Voltage Package Area: 31mm² (8-Lead SOIC) (AD744JRZ)mm² Eval / Ref Circuit: Evaluation board Export Classification: EAR99 Automotive: No Reliability Level: 883,DIE Temp Range: -55 to 125°C Package Finish Code: E3, NA, PB Package Height: 1.75mm (8-Lead SOIC) (AD744JRZ)mm Launch Date: 2005-05-03 Terminal Finish: E3, NA, PB Temp Range Code: NA EP: No Design Tools: LTspice

AD744KRZ-REEL

分类:
数据:

简介: 精密、500 ns建立时间、BiFET运算放大器

Product Lifecycle: 不推荐用于新设计 Package: 8-Pin TO-99,8-Lead PDIP,8-Lead CerDIP,8-Lead SOIC,CHIPS OR DIE # of Amps: 1 GBP (typ): 13MHz BW -3 dB (typ): 13MHz Slew Rate (typ): 75V/us Vos (typ): 250µV Vos (max): 500µV Vos TC (typ): 5µV/°C Vos TC (max): 10µV/°C VNoise Density (typ): 16nV/rtHz Current Noise Density (typ): 10fA/rtHz 0.1 to 10 Hz VNoise (typ): 2µV p-p Ibias (typ): 30pA Ibias (max): 100pA Ios (typ): 10pA Ios (max): 50pA Iq/Amp (typ): 3.5mA Iq/Amp (max): 5mA Vs span (min): 9V
Vs span (max): 36V CMRR (typ): 88dB CMRR (min): 82dB Input Architecture: JFET PSRR DC (typ): 95dB In V+ Headroom (typ): 500mV In V- Headroom (typ): 3.5V Out V+ Headroom (max): 2V Out V+ Headroom (typ): 1.1V Out V- Headroom (typ): 1.7V Out V- Headroom (max): 2.5V Aol (typ): 112dB Min Stable Gain: 2V/V Shutdown: No Over-the-Top: No Ccm (typ): 5.5pF Cdiff (typ): 5.5pF Open Loop Rout: 60Ohms Feedback Type: Voltage Package Area: 31mm² (8-Lead SOIC) (AD744JRZ)mm² Eval / Ref Circuit: Evaluation board Export Classification: EAR99 Automotive: No Reliability Level: 883,DIE Temp Range: -55 to 125°C Package Finish Code: E3, NA, PB Package Height: 1.75mm (8-Lead SOIC) (AD744JRZ)mm Launch Date: 2005-05-03 Terminal Finish: E3, NA, PB Temp Range Code: NA EP: No Design Tools: LTspice

AD744KRZ-REEL7

分类:
数据:

简介: 精密、500 ns建立时间、BiFET运算放大器

Product Lifecycle: 不推荐用于新设计 Package: 8-Pin TO-99,8-Lead PDIP,8-Lead CerDIP,8-Lead SOIC,CHIPS OR DIE # of Amps: 1 GBP (typ): 13MHz BW -3 dB (typ): 13MHz Slew Rate (typ): 75V/us Vos (typ): 250µV Vos (max): 500µV Vos TC (typ): 5µV/°C Vos TC (max): 10µV/°C VNoise Density (typ): 16nV/rtHz Current Noise Density (typ): 10fA/rtHz 0.1 to 10 Hz VNoise (typ): 2µV p-p Ibias (typ): 30pA Ibias (max): 100pA Ios (typ): 10pA Ios (max): 50pA Iq/Amp (typ): 3.5mA Iq/Amp (max): 5mA Vs span (min): 9V
Vs span (max): 36V CMRR (typ): 88dB CMRR (min): 82dB Input Architecture: JFET PSRR DC (typ): 95dB In V+ Headroom (typ): 500mV In V- Headroom (typ): 3.5V Out V+ Headroom (max): 2V Out V+ Headroom (typ): 1.1V Out V- Headroom (typ): 1.7V Out V- Headroom (max): 2.5V Aol (typ): 112dB Min Stable Gain: 2V/V Shutdown: No Over-the-Top: No Ccm (typ): 5.5pF Cdiff (typ): 5.5pF Open Loop Rout: 60Ohms Feedback Type: Voltage Package Area: 31mm² (8-Lead SOIC) (AD744JRZ)mm² Eval / Ref Circuit: Evaluation board Export Classification: EAR99 Automotive: No Reliability Level: 883,DIE Temp Range: -55 to 125°C Package Finish Code: E3, NA, PB Package Height: 1.75mm (8-Lead SOIC) (AD744JRZ)mm Launch Date: 2005-05-03 Terminal Finish: E3, NA, PB Temp Range Code: NA EP: No Design Tools: LTspice

AD744TH883B

分类:
数据:

简介: 精密、500 ns建立时间、BiFET运算放大器

Product Lifecycle: 不推荐用于新设计 Package: 8-Pin TO-99,8-Lead PDIP,8-Lead CerDIP,8-Lead SOIC,CHIPS OR DIE # of Amps: 1 GBP (typ): 13MHz BW -3 dB (typ): 13MHz Slew Rate (typ): 75V/us Vos (typ): 250µV Vos (max): 500µV Vos TC (typ): 5µV/°C Vos TC (max): 10µV/°C VNoise Density (typ): 16nV/rtHz Current Noise Density (typ): 10fA/rtHz 0.1 to 10 Hz VNoise (typ): 2µV p-p Ibias (typ): 30pA Ibias (max): 100pA Ios (typ): 10pA Ios (max): 50pA Iq/Amp (typ): 3.5mA Iq/Amp (max): 5mA Vs span (min): 9V
Vs span (max): 36V CMRR (typ): 88dB CMRR (min): 82dB Input Architecture: JFET PSRR DC (typ): 95dB In V+ Headroom (typ): 500mV In V- Headroom (typ): 3.5V Out V+ Headroom (max): 2V Out V+ Headroom (typ): 1.1V Out V- Headroom (typ): 1.7V Out V- Headroom (max): 2.5V Aol (typ): 112dB Min Stable Gain: 2V/V Shutdown: No Over-the-Top: No Ccm (typ): 5.5pF Cdiff (typ): 5.5pF Open Loop Rout: 60Ohms Feedback Type: Voltage Package Area: 31mm² (8-Lead SOIC) (AD744JRZ)mm² Eval / Ref Circuit: Evaluation board Export Classification: EAR99 Automotive: No Reliability Level: 883,DIE Temp Range: -55 to 125°C Package Finish Code: E3, NA, PB Package Height: 1.75mm (8-Lead SOIC) (AD744JRZ)mm Launch Date: 2005-05-03 Terminal Finish: E3, NA, PB Temp Range Code: NA EP: No Design Tools: LTspice