CY7C25632KV18-550BZC
制造商:
物料参数
| Architecture: | QDR-II+, ODT |
| Bank Switching: | N |
| Burst Length(Words): | 4 |
| Data Width: | x 18 |
| Family: | QDR-II+, ODT |
| Lead Ball Finish: | Sn/Pb |
| Operating Temperature: | None°C |
| Organization (X x Y): | 4Mb x 18 |
| Peak Reflow Temp: | 260.0°C |
| Qualification: | Commercial |
| Read Latency (Cycles): | 2.5 |
| Frequency: | 550.0MHz |
| ECC: | N |
| On-Die Termination: | Y |
| Operating Voltage: | NoneV |
| Interfaces: | Parallel |
| Density: | 73728.0kBit |
| Density: | 72.0MBit |
无库存