CY7C1354C-166AXIT

制造商:

物料参数

Architecture:NoBL, Pipeline
Bank Switching:N
Data Width:x 36
Family:NoBL
Frequency:166.0MHz
Lead Ball Finish:Pure Sn;Ni/Pd/Au
Qualification:Industrial
Read Latency (Cycles):1.0
Peak Reflow Temp:260.0°C
ECC:N
Organization (X x Y):256Kb x 36
Operating Temperature:None°C
On-Die Termination:N
Operating Voltage:NoneV
Interfaces:Parallel
Density:9216.0kBit
Density:9.0MBit
无库存