物料参数
| Architecture: | Standard Sync, Flow-through |
| Bank Switching: | N |
| Data Width: | x 36 |
| Family: | Synchronous SRAM with ECC |
| Frequency: | 133.0MHz |
| Lead Ball Finish: | Pure Sn |
| On-Die Termination: | N |
| Operating Temperature: | None°C |
| Organization (X x Y): | 256Kb x 36 |
| Qualification: | Military |
| Peak Reflow Temp: | 260.0°C |
| ECC: | Y |
| Operating Voltage: | NoneV |
| Interfaces: | Parallel |
| Density: | 9216.0kBit |
| Density: | 9.0MBit |