Architecture: QDR-II Bank Switching: N Burst Length(Words): 2 ECC: N Family: QDR-II Frequency: 250.0MHz On-Die Termination: N Operating Temperature: None°C Organization (X x Y): 8Mb x 18 Qualification: Industrial Read Latency (Cycles): 1.5 Data Width: x 18 Peak Reflow Temp: 260.0°C Lead Ball Finish: Sn/Ag/Cu Operating Voltage: NoneV Interfaces: Parallel Density: 147456.0kBit Density: 144.0MBit

Bank Switching: N Burst Length(Words): 4 ECC: N Family: NoBL Frequency: 167.0MHz Lead Ball Finish: Sn/Ag/Cu On-Die Termination: N Operating Temperature: None°C Organization (X x Y): 512Kb x 36 Qualification: Industrial Read Latency (Cycles): 2.0 Peak Reflow Temp: 260.0°C Data Width: x 36 Architecture: NoBL, Pipeline Operating Voltage: NoneV Interfaces: Parallel Density: 18432.0kBit Density: 18.0MBit

Architecture: NoBL, Pipeline Burst Length(Words): 4 Data Width: x 36 Family: NoBL Frequency: 250.0MHz Lead Ball Finish: Pure Sn On-Die Termination: N Operating Temperature: None°C Organization (X x Y): 512Kb x 36 Peak Reflow Temp: 260.0°C Qualification: Commercial ECC: N Bank Switching: N Read Latency (Cycles): 2.0 Operating Voltage: NoneV Interfaces: Parallel Density: 18432.0kBit Density: 18.0MBit

Bank Switching: N Data Width: x 36 ECC: N Family: NoBL Frequency: 133.0MHz On-Die Termination: N Operating Temperature: None°C Peak Reflow Temp: 260.0°C Qualification: Industrial Read Latency (Cycles): 1.0 Lead Ball Finish: Ni/Pd/Au Organization (X x Y): 1Mb x 36 Architecture: NoBL, Flow-through Operating Voltage: NoneV Interfaces: Parallel Density: 36864.0kBit Density: 36.0MBit

Architecture: NoBL, Flow-through Bank Switching: N Burst Length(Words): 4 Data Width: x 18 Family: NoBL Frequency: 100.0MHz Lead Ball Finish: Pure Sn On-Die Termination: N Operating Temperature: None°C Organization (X x Y): 1Mb x 18 Qualification: Commercial Read Latency (Cycles): 1.0 ECC: N Peak Reflow Temp: 260.0°C Operating Voltage: NoneV Interfaces: Parallel Density: 18432.0kBit Density: 18.0MBit

Bank Switching: Y Burst Length(Words): 2 ECC: Y Family: QDR-IV Frequency: 933.0MHz Lead Ball Finish: Sn/Ag/Cu On-Die Termination: Y Operating Temperature: None°C Organization (X x Y): 4Mb x 36 Peak Reflow Temp: 260.0°C Read Latency (Cycles): 8.0 Data Width: x 36 Architecture: QDR-IV Qualification: Industrial Operating Voltage: NoneV Interfaces: Parallel Density: 147456.0kBit Density: 144.0MBit

Family: QDR-II+, ODT Lead Ball Finish: Sn/Ag/Cu Operating Voltage: NoneV Peak Reflow Temp: 260.0°C Operating Temperature: None°C Interfaces: Parallel Frequency: 450.0MHz Organization (X x Y): 2M x 18 Qualification: Industrial Density: 36.0MBit

Architecture: QDR-II+, ODT Bank Switching: N ECC: N Family: QDR-II+, ODT Frequency: 333.0MHz Lead Ball Finish: Sn/Ag/Cu On-Die Termination: Y Operating Temperature: None°C Organization (X x Y): 4Mb x 36 Peak Reflow Temp: 260.0°C Qualification: Industrial Read Latency (Cycles): 2.5 Data Width: x 36 Burst Length(Words): 2 Operating Voltage: NoneV Interfaces: Parallel Density: 147456.0kBit Density: 144.0MBit

Family: QDR-II+, ODT Lead Ball Finish: Sn/Ag/Cu Operating Voltage: NoneV Peak Reflow Temp: 260.0°C Operating Temperature: None°C Interfaces: Parallel Frequency: 400.0MHz Organization (X x Y): 4M x 18 Qualification: Industrial Density: 72.0MBit

Architecture: QDR-II+ Bank Switching: N Burst Length(Words): 4 ECC: N Family: QDR-II+ Frequency: 400.0MHz Lead Ball Finish: Sn/Ag/Cu On-Die Termination: N Operating Temperature: None°C Organization (X x Y): 2Mb x 18 Peak Reflow Temp: 260.0°C Qualification: Industrial Read Latency (Cycles): 2.5 Data Width: x 18 Operating Voltage: NoneV Interfaces: Parallel Density: 36864.0kBit Density: 36.0MBit