Family: QDR-II Lead Ball Finish: Sn/Ag/Cu Operating Temperature: None°C Operating Voltage: NoneV Peak Reflow Temp: 260.0°C Interfaces: Parallel Frequency: 250.0MHz Organization (X x Y): 1M x 18 Qualification: Commercial Density: 18.0MBit

Family: QDR-II+, ODT Lead Ball Finish: Sn/Ag/Cu Operating Temperature: None°C Operating Voltage: NoneV Peak Reflow Temp: 260.0°C Interfaces: Parallel Frequency: 500.0MHz Organization (X x Y): 2Mb x 36 Qualification: Commercial Density: 72.0MBit

Family: QDR-II Operating Voltage: NoneV Peak Reflow Temp: 260.0°C Lead Ball Finish: Sn/Pb Operating Temperature: None°C Interfaces: Parallel Frequency: 250.0MHz Organization (X x Y): 2M x 18 Qualification: Industrial Density: 36.0MBit

Architecture: NoBL, Pipeline Data Width: x 36 Frequency: 200.0MHz On-Die Termination: N Operating Temperature: None°C Organization (X x Y): 2Mb x 36 Read Latency (Cycles): 1.0 Peak Reflow Temp: 260.0°C ECC: N Family: NoBL Bank Switching: N Qualification: Commercial Lead Ball Finish: Pure Sn Operating Voltage: NoneV Interfaces: Parallel Density: 73728.0kBit Density: 72.0MBit

Architecture: QDR-IV Bank Switching: N Burst Length(Words): 2 Data Width: x 36 Family: QDR-IV Frequency: 667.0MHz Lead Ball Finish: Sn/Ag/Cu On-Die Termination: Y Operating Temperature: None°C Organization (X x Y): 4Mb x 36 Peak Reflow Temp: 260.0°C Qualification: Commercial Read Latency (Cycles): 5.0 ECC: Y Operating Voltage: NoneV Interfaces: Parallel Density: 147456.0kBit Density: 144.0MBit

Architecture: Standard Sync, Pipeline SCD Bank Switching: N Burst Length(Words): 4 Data Width: x 36 Frequency: 167.0MHz Lead Ball Finish: Pure Sn On-Die Termination: N Operating Temperature: None°C Organization (X x Y): 512Kb x 36 Peak Reflow Temp: 260.0°C ECC: N Qualification: Commercial Family: Standard Sync Read Latency (Cycles): 2.0 Operating Voltage: NoneV Interfaces: Parallel Density: 18432.0kBit Density: 18.0MBit

Architecture: NoBL, Pipeline Bank Switching: N Data Width: x 36 Family: NoBL On-Die Termination: N Operating Temperature: None°C Organization (X x Y): 256Kb x 36 Qualification: Commercial Read Latency (Cycles): 1.0 Frequency: 166.0MHz ECC: N Peak Reflow Temp: 260.0°C Lead Ball Finish: Ni/Pd/Au Operating Voltage: NoneV Interfaces: Parallel Density: 9216.0kBit Density: 9.0MBit

Architecture: QDR-II+ Xtreme Bank Switching: N Burst Length(Words): 2 Data Width: x 36 Family: QDR-II+ Xtreme Lead Ball Finish: Sn/Ag/Cu On-Die Termination: Y Operating Temperature: None°C Organization (X x Y): 2Mb x 36 Peak Reflow Temp: 260.0°C Qualification: Commercial Read Latency (Cycles): 2.5 ECC: N Frequency: 450.0MHz Operating Voltage: NoneV Interfaces: Parallel Density: 73728.0kBit Density: 72.0MBit

Architecture: NoBL, Pipeline Data Width: x 18 ECC: N Family: NoBL Frequency: 250.0MHz Lead Ball Finish: Pure Sn;Ni/Pd/Au Operating Temperature: None°C Organization (X x Y): 512Kb x 18 Qualification: Commercial Read Latency (Cycles): 1.0 Bank Switching: N On-Die Termination: N Peak Reflow Temp: 260.0°C Operating Voltage: NoneV Interfaces: Parallel Density: 9216.0kBit Density: 9.0MBit

Architecture: QDR-II+ Burst Length(Words): 4 Data Width: x 36 Family: QDR-II+ Frequency: 400.0MHz Lead Ball Finish: Sn/Ag/Cu On-Die Termination: N Operating Temperature: None°C Organization (X x Y): 4Mb x 36 Peak Reflow Temp: 260.0°C Qualification: Industrial Read Latency (Cycles): 2.0 Bank Switching: N ECC: N Operating Voltage: NoneV Interfaces: Parallel Density: 147456.0kBit Density: 144.0MBit