Architecture: Standard Sync, Flow-through Bank Switching: N Frequency: 100.0MHz Lead Ball Finish: Sn/Ag/Cu On-Die Termination: N Operating Temperature: None°C Organization (X x Y): 128Kb x 36 Peak Reflow Temp: 260.0°C Qualification: Automotive(E) ECC: N Data Width: x 36 Operating Voltage: NoneV Interfaces: Parallel Density: 4096.0kBit Density: 4.0MBit

Lead Ball Finish: Sn/Ag/Cu Operating Temperature: None°C Operating Voltage: NoneV Peak Reflow Temp: 260.0°C Family: QDR-II Interfaces: Parallel Frequency: 250.0MHz Organization (X x Y): 2M x 18 Qualification: Industrial Density: 36.0MBit

Family: QDR-II Lead Ball Finish: Sn/Pb Operating Temperature: None°C Operating Voltage: NoneV Peak Reflow Temp: 260.0°C Interfaces: Parallel Frequency: 250.0MHz Organization (X x Y): 2M x 18 Qualification: Commercial Density: 36.0MBit

Family: QDR-II Lead Ball Finish: Sn/Pb Operating Temperature: None°C Operating Voltage: NoneV Peak Reflow Temp: 260.0°C Interfaces: Parallel Frequency: 250.0MHz Organization (X x Y): 1M x 36 Qualification: Industrial Density: 36.0MBit

Architecture: QDR-II+, ODT Burst Length(Words): 4 Data Width: x 18 Family: QDR-II+, ODT Lead Ball Finish: Sn/Pb On-Die Termination: Y Operating Temperature: None°C Organization (X x Y): 8Mb x 18 Qualification: Industrial Peak Reflow Temp: 260.0°C ECC: N Frequency: 450.0MHz Bank Switching: N Read Latency (Cycles): 2.5 Operating Voltage: NoneV Interfaces: Parallel Density: 147456.0kBit Density: 144.0MBit

Architecture: Standard Sync, Flow-through Bank Switching: N Data Width: x 18 ECC: N Family: Standard Sync Frequency: 133.0MHz Lead Ball Finish: Pure Sn On-Die Termination: N Operating Temperature: None°C Organization (X x Y): 1Mb x 18 Peak Reflow Temp: 260.0°C Qualification: Commercial Read Latency (Cycles): 1.0 Burst Length(Words): 4 Operating Voltage: NoneV Interfaces: Parallel Density: 18.0MBit Density: 18432.0kBit

Family: QDR-II Lead Ball Finish: Sn/Ag/Cu Operating Temperature: None°C Operating Voltage: NoneV Peak Reflow Temp: 260.0°C Interfaces: Parallel Frequency: 250.0MHz Organization (X x Y): 2M x 18 Qualification: Commercial Density: 36.0MBit

Lead Ball Finish: Sn/Ag/Cu Operating Temperature: None°C Operating Voltage: NoneV Peak Reflow Temp: 260.0°C Family: QDR-II+, ODT Interfaces: Parallel Frequency: 550.0MHz Organization (X x Y): 4M x 18 Qualification: Industrial Density: 72.0MBit

Bank Switching: N Burst Length(Words): 2 Data Width: x 9 Family: QDR-II Frequency: 333.0MHz Lead Ball Finish: Sn/Ag/Cu On-Die Termination: N Operating Temperature: None°C Organization (X x Y): 8Mb x 9 Peak Reflow Temp: 260.0°C Qualification: Commercial ECC: N Architecture: QDR-II Read Latency (Cycles): 1.5 Operating Voltage: NoneV Interfaces: Parallel Density: 73728.0kBit Density: 72.0MBit

Architecture: NoBL, Pipeline Bank Switching: N Burst Length(Words): 4 Data Width: x 18 Family: NoBL Frequency: 167.0MHz Lead Ball Finish: Pure Sn On-Die Termination: N Organization (X x Y): 1Mb x 18 Peak Reflow Temp: 260.0°C Qualification: Commercial Read Latency (Cycles): 2.0 ECC: N Operating Temperature: None°C Operating Voltage: NoneV Interfaces: Parallel Density: 18432.0kBit Density: 18.0MBit