Bank Switching: N Burst Length(Words): 4 Data Width: x 36 ECC: N Family: QDR-II Frequency: 333.0MHz Lead Ball Finish: Sn/Ag/Cu Operating Temperature: None°C Organization (X x Y): 2Mb x 36 Peak Reflow Temp: 260.0°C Qualification: Commercial Read Latency (Cycles): 1.5 Architecture: QDR-II On-Die Termination: N Operating Voltage: NoneV Interfaces: Parallel Density: 73728.0kBit Density: 72.0MBit
Bank Switching: N Data Width: x 36 ECC: N Family: NoBL Frequency: 200.0MHz Lead Ball Finish: Sn/Pb On-Die Termination: N Operating Temperature: None°C Peak Reflow Temp: 220.0°C Qualification: Industrial Read Latency (Cycles): 1.0 Architecture: NoBL, Pipeline Organization (X x Y): 2Mb x 36 Operating Voltage: NoneV Interfaces: Parallel Density: 73728.0kBit Density: 72.0MBit
Family: QDR-II+, ODT Lead Ball Finish: Sn/Ag/Cu Operating Temperature: None°C Operating Voltage: NoneV Peak Reflow Temp: 260.0°C Interfaces: Parallel Frequency: 550.0MHz Organization (X x Y): 2Mb x 36 Qualification: Industrial Density: 72.0MBit
Architecture: NoBL, Pipeline Bank Switching: N Data Width: x 36 Family: NoBL Frequency: 167.0MHz Lead Ball Finish: Ni/Pd/Au On-Die Termination: N Operating Temperature: None°C Organization (X x Y): 1Mb x 36 Qualification: Industrial Read Latency (Cycles): 1.0 ECC: N Peak Reflow Temp: 260.0°C Operating Voltage: NoneV Interfaces: Parallel Density: 36864.0kBit Density: 36.0MBit
Architecture: QDR-II+ Bank Switching: N Burst Length(Words): 4 Data Width: x 36 Family: QDR-II+ Frequency: 450.0MHz Lead Ball Finish: Sn/Ag/Cu On-Die Termination: N Organization (X x Y): 4Mb x 36 Qualification: Industrial Read Latency (Cycles): 2.0 ECC: N Operating Temperature: None°C Peak Reflow Temp: 260.0°C Operating Voltage: NoneV Interfaces: Parallel Density: 147456.0kBit Density: 144.0MBit
Architecture: Standard Sync, Pipeline SCD Bank Switching: N Data Width: x 36 Family: Standard Sync Lead Ball Finish: None On-Die Termination: N Operating Temperature: None°C Operating Voltage(VCCQ): NoneV Operating Voltage: NoneV Organization (X x Y): 256Kb x 36 Qualification: Industrial ECC: N Read Latency (Cycles): 1.0 Interfaces: Parallel Density: 9216.0kBit Density: 9.0MBit
Family: QDR-II+, ODT Lead Ball Finish: Sn/Ag/Cu Operating Temperature: None°C Operating Voltage: NoneV Peak Reflow Temp: 260.0°C Interfaces: Parallel Frequency: 450.0MHz Organization (X x Y): 4M x 18 Qualification: Industrial Density: 72.0MBit
Architecture: Standard Sync, Flow-through Bank Switching: N Burst Length(Words): 4 ECC: N Family: Standard Sync Frequency: 133.0MHz Lead Ball Finish: Pure Sn On-Die Termination: N Operating Temperature: None°C Peak Reflow Temp: 260.0°C Qualification: Industrial Read Latency (Cycles): 1.0 Data Width: x 36 Organization (X x Y): 512Kb x 36 Operating Voltage: NoneV Interfaces: Parallel Density: 18432.0kBit Density: 18.0MBit
Architecture: QDR-II Bank Switching: N Data Width: x 18 Family: QDR-II Frequency: 333.0MHz Lead Ball Finish: Sn/Ag/Cu On-Die Termination: N Operating Temperature: None°C Organization (X x Y): 8Mb x 18 Peak Reflow Temp: 260.0°C Qualification: Commercial Burst Length(Words): 4 ECC: N Read Latency (Cycles): 1.5 Operating Voltage: NoneV Interfaces: Parallel Density: 147456.0kBit Density: 144.0MBit
Family: QDR-II+, ODT Lead Ball Finish: Sn/Ag/Cu Operating Temperature: None°C Operating Voltage: NoneV Peak Reflow Temp: 260.0°C Interfaces: Parallel Frequency: 450.0MHz Organization (X x Y): 1M x 36 Qualification: Industrial Density: 36.0MBit