Family: QDR-II+ Xtreme Lead Ball Finish: Sn/Ag/Cu Operating Temperature: None°C Operating Voltage: NoneV Peak Reflow Temp: 260.0°C Interfaces: Parallel Frequency: 633.0MHz Organization (X x Y): 4M x 18 Qualification: Commercial Density: 72.0MBit

Architecture: QDR-II+, ODT Burst Length(Words): 2 ECC: N Family: QDR-II+, ODT Frequency: 300.0MHz Lead Ball Finish: Sn/Ag/Cu On-Die Termination: Y Organization (X x Y): 4Mb x 36 Peak Reflow Temp: 260.0°C Qualification: Industrial Data Width: x 36 Operating Temperature: None°C Bank Switching: N Read Latency (Cycles): 2.5 Operating Voltage: NoneV Interfaces: Parallel Density: 147456.0kBit Density: 144.0MBit

Lead Ball Finish: Sn/Ag/Cu Operating Temperature: None°C Operating Voltage: NoneV Peak Reflow Temp: 260.0°C Family: QDR-II Interfaces: Parallel Frequency: 300.0MHz Organization (X x Y): 2M x 36 Qualification: Commercial Density: 72.0MBit

Architecture: QDR-II Bank Switching: N Burst Length(Words): 4 Data Width: x 18 Family: QDR-II Frequency: 300.0MHz Lead Ball Finish: Sn/Ag/Cu On-Die Termination: N Operating Temperature: None°C Organization (X x Y): 8Mb x 18 Qualification: Commercial Peak Reflow Temp: 260.0°C ECC: N Read Latency (Cycles): 1.5 Operating Voltage: NoneV Interfaces: Parallel Density: 147456.0kBit Density: 144.0MBit

Family: QDR-II Lead Ball Finish: Sn/Pb Operating Temperature: None°C Peak Reflow Temp: 260.0°C Operating Voltage: NoneV Interfaces: Parallel Frequency: 250.0MHz Organization (X x Y): 1M x 18 Qualification: Industrial Density: 18.0MBit

Family: QDR-II Operating Voltage: NoneV Peak Reflow Temp: 260.0°C Operating Temperature: None°C Lead Ball Finish: Sn/Ag/Cu Interfaces: Parallel Frequency: 250.0MHz Organization (X x Y): 512K x 36 Qualification: Commercial Density: 18.0MBit

Architecture: QDR-IV Burst Length(Words): 2 ECC: Y Family: QDR-IV Frequency: 933.0MHz Lead Ball Finish: Sn/Ag/Cu On-Die Termination: Y Operating Temperature: None°C Organization (X x Y): 8Mb x 18 Peak Reflow Temp: 260.0°C Qualification: Industrial Read Latency (Cycles): 8.0 Data Width: x 18 Bank Switching: Y Operating Voltage: NoneV Interfaces: Parallel Density: 147456.0kBit Density: 144.0MBit

Bank Switching: N Burst Length(Words): 4 Data Width: x 18 ECC: N Family: QDR-II+ Frequency: 450.0MHz Lead Ball Finish: Sn/Pb Operating Temperature: None°C Organization (X x Y): 8Mb x 18 Qualification: Industrial Architecture: QDR-II+ On-Die Termination: N Peak Reflow Temp: 260.0°C Read Latency (Cycles): 2.0 Operating Voltage: NoneV Interfaces: Parallel Density: 147456.0kBit Density: 144.0MBit

Architecture: NoBL, Pipeline Bank Switching: N Burst Length(Words): 4 ECC: N Family: NoBL Lead Ball Finish: Pure Sn On-Die Termination: N Operating Temperature: None°C Organization (X x Y): 1Mb x 18 Qualification: Industrial Read Latency (Cycles): 2.0 Data Width: x 18 Frequency: 167.0MHz Peak Reflow Temp: 260.0°C Operating Voltage: NoneV Interfaces: Parallel Density: 18432.0kBit Density: 18.0MBit

Architecture: QDR-II+ Bank Switching: N Burst Length(Words): 4 ECC: N Family: QDR-II+ Frequency: 400.0MHz Lead Ball Finish: Sn/Ag/Cu On-Die Termination: N Operating Temperature: None°C Organization (X x Y): 4Mb x 18 Peak Reflow Temp: 260.0°C Read Latency (Cycles): 2.5 Data Width: x 18 Qualification: Commercial Operating Voltage: NoneV Interfaces: Parallel Density: 73728.0kBit Density: 72.0MBit