Architecture: QDR-II+, ODT
Bank Switching: N
Data Width: x 36
ECC: N
Family: QDR-II+, ODT
Frequency: 550.0MHz
Lead Ball Finish: Sn/Ag/Cu
On-Die Termination: Y
Organization (X x Y): 4Mb x 36
Peak Reflow Temp: 260.0°C
Qualification: Commercial
Read Latency (Cycles): 2.5
Operating Temperature: None°C
Burst Length(Words): 4
Operating Voltage: NoneV
Interfaces: Parallel
Density: 147456.0kBit
Density: 144.0MBit
Architecture: NoBL, Pipeline
Bank Switching: N
ECC: N
Lead Ball Finish: Ni/Pd/Au
On-Die Termination: N
Operating Temperature: None°C
Organization (X x Y): 1Mb x 36
Peak Reflow Temp: 260.0°C
Qualification: Industrial
Data Width: x 36
Family: NoBL
Frequency: 167.0MHz
Read Latency (Cycles): 1.0
Operating Voltage: NoneV
Interfaces: Parallel
Density: 36864.0kBit
Density: 36.0MBit
Architecture: Standard Sync, Pipeline DCD
Bank Switching: N
Data Width: x 36
Family: Standard Sync
Frequency: 250.0MHz
Lead Ball Finish: Ni/Pd/Au
On-Die Termination: N
Operating Temperature: None°C
Organization (X x Y): 1Mb x 36
Qualification: Commercial
Read Latency (Cycles): 1.0
ECC: N
Peak Reflow Temp: 260.0°C
Operating Voltage: NoneV
Interfaces: Parallel
Density: 36864.0kBit
Density: 36.0MBit
Architecture: QDR-II
Bank Switching: N
Burst Length(Words): 2
Data Width: x 9
Family: QDR-II
Frequency: 333.0MHz
Lead Ball Finish: Sn/Ag/Cu
On-Die Termination: N
Operating Temperature: None°C
Organization (X x Y): 16Mb x 9
Peak Reflow Temp: 260.0°C
Qualification: Commercial
Read Latency (Cycles): 1.5
ECC: N
Operating Voltage: NoneV
Interfaces: Parallel
Density: 147456.0kBit
Density: 144.0MBit
Architecture: Standard Sync, Pipeline SCD
Bank Switching: N
Data Width: x 18
ECC: N
Frequency: 200.0MHz
Lead Ball Finish: Sn/Pb
On-Die Termination: N
Operating Temperature: None°C
Organization (X x Y): 4Mb x 18
Peak Reflow Temp: 220.0°C
Read Latency (Cycles): 1.0
Family: Standard Sync
Qualification: Industrial
Operating Voltage: NoneV
Interfaces: Parallel
Density: 73728.0kBit
Density: 72.0MBit
Family: QDR-II
Lead Ball Finish: Sn/Pb
Operating Voltage: NoneV
Operating Temperature: None°C
Peak Reflow Temp: 260.0°C
Interfaces: Parallel
Frequency: 250.0MHz
Organization (X x Y): 4M x 18
Qualification: Industrial
Density: 72.0MBit
Architecture: Standard Sync, Flow-through
Bank Switching: N
Data Width: x 36
ECC: N
Family: Standard Sync
Frequency: 133.0MHz
Lead Ball Finish: Ni/Pd/Au
Operating Temperature: None°C
Organization (X x Y): 1Mb x 36
Peak Reflow Temp: 260.0°C
Qualification: Industrial
Read Latency (Cycles): 1.0
On-Die Termination: N
Operating Voltage: NoneV
Interfaces: Parallel
Density: 36864.0kBit
Density: 36.0MBit
Architecture: QDR-II
Burst Length(Words): 2
Data Width: x 18
Family: QDR-II
Frequency: 333.0MHz
Lead Ball Finish: Sn/Ag/Cu
On-Die Termination: N
Operating Temperature: None°C
Organization (X x Y): 8Mb x 18
Peak Reflow Temp: 260.0°C
Read Latency (Cycles): 1.5
ECC: N
Bank Switching: N
Qualification: Commercial
Operating Voltage: NoneV
Interfaces: Parallel
Density: 147456.0kBit
Density: 144.0MBit
Lead Ball Finish: Sn/Pb
Operating Temperature: None°C
Peak Reflow Temp: 260.0°C
Operating Voltage: NoneV
Family: QDR-II
Interfaces: Parallel
Frequency: 250.0MHz
Organization (X x Y): 4M x 18
Qualification: Industrial
Density: 72.0MBit
Bank Switching: N
Data Width: x 36
Family: Standard Sync
On-Die Termination: N
Operating Temperature: None°C
Organization (X x Y): 256Kb x 36
Peak Reflow Temp: 260.0°C
Qualification: Industrial
ECC: N
Frequency: 133.0MHz
Architecture: Standard Sync, Flow-through
Lead Ball Finish: Pure Sn
Operating Voltage: NoneV
Interfaces: Parallel
Density: 9216.0kBit
Density: 9.0MBit